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ASTRA’S SCORECARD

Microduck Body Rev D

@chih-yang04·4 copper layers·On the leaderboard

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ASTRA SCORE
91/100
PASSEDBARELY A SCRATCH
BARELY A SCRATCH
ASTRAHAS ENTERED THE CHAT
5V_PGOOD reports to a pull-up resistor and nobody else. The power supply has appointed itself employee of the month.

A well-executed carrier with clean configured PCB checks, disciplined camera routing and useful connector legends. Fabrication sign-off and power diagnostics are the main remaining refinements.

THE BREAKDOWN20% EACH
Routing92/100

Camera pairs show deliberate length matching and no layer transitions. Configured DRC, connectivity and schematic-parity checks are clean; this is strong execution, not proof of high-speed compliance.

Power and protection89/100

The integrated buck, reverse-polarity MOSFETs, bank fuses and local bulk form a considered power architecture. Nearby rail capacitors and extensive ground copper support it; load-transient and thermal performance remain unverified.

Circuit design & placement92/100

Sampled servo connectors sit along the perimeter, while local IC supply capacitors are generally within roughly 2.5 mm by the saved pad-distance metric. Front-only component placement simplifies assembly.

Manufacturability89/100

Configured PCB checks pass without exclusions. The 0.1 mm minimum tracks and 0.2 mm drills are explicit process requirements, not inherent defects; the provisional stackup still needs fabrication agreement.

Clarity & silkscreen94/100

Functional board-level legends prioritize wiring and operation over reference clutter. Assembly references remain available on F.Fab, and configured silk checks report no violations.

FIX THESE FIRST
01

Close the fabrication-dependent impedance specification

The stackup materials explicitly say “FAB CONFIRM,” while CSI100 and USB90 classes prescribe different differential geometries. Those settings document intent but do not establish impedance on the delivered laminate.

Fix: Agree the stackup and 100-ohm CSI / 90-ohm USB geometry with the fabricator, and include impedance tolerances and coupon requirements in the order.

02

Make power-good useful during bring-up

5V_PGOOD connects only U701's open-collector PG output and R706's pull-up to COMPUTE_5V. Leaving it unused is electrically reasonable, but it offers no automatic fault indication to the compute module.

Fix: Consider a labeled probe pad or monitoring input; level-shift or change the pull-up appropriately before connecting a 3.3 V GPIO.

What works

  • All three camera differential pairs stay on F.Cu without vias, with each pair's lengths equal to the reported 0.001 mm precision.
  • In1.Cu provides a single filled ground region covering about 95% of its zone outline, without routed tracks on that layer.
  • Numbered servo pin legends, battery polarity, UART signals, reset/boot labels and board revision make the board useful at the bench.

Review scope

This review assesses design evidence. Physical testing and manufacturing validation are outside its scope.

5 coverage notes
  • No fabrication profile or manufactured impedance measurements were available; configured DRC is not vendor qualification.
  • Servo load profiles, cable lengths, thermal tests and power-transient measurements were not supplied.
  • Detailed return paths, assembled mechanical clearances and complete component datasheet compliance were not independently validated.
  • ERC ran with zero errors and 15 warnings concerning four-way junctions and single-use global labels; these do not establish electrical failures.
  • Some automated schematic checks were unavailable: symbol pins, drawing layout, no-connect markers, component descriptions.