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Copyright (c) 2023-2024 Antmicro
This project contains open hardware design files for an adapter board wrapping 4-lane (i.e. 4x) PCIe Gen 3.0 devices into a Thunderbolt 3 uplink. It is based on the Intel/JHL6340SLLSQ Thunderbolt controller. The design files were prepared in KiCad 7.x.
The Thunderbolt GPU adapter features an edge connector that plays a key role in the scalability and functionality of this solution. This edge connector is designed for seamless integration with a PCB backplane, allowing multiple PCIe devices to be connected in a cluster.
This approach has the following advantages:
The edge connector is used to power the Thunderbolt GPU adapter from the PCB backplane. This enables efficient and consistent power supply to all connected PCIe devices, while providing power management and monitoring for individual devices.
Beyond power, the edge connector facilitates communication between the Thunderbolt GPU adapters and the backplane PCB. This communication allows the aggregation of status data from individual boards, providing a centralized view of the entire cluster's health and performance.
The modular nature of the board allows for simple expansion of the system, making it scalable, allowing users to incrementally increase computing power by connecting additional cards to the backplane.
Thunderbolt's plug-and-play capability eliminates the need for complex configurations. Users can connect any PCIe devices to host devices effortlessly.
The Thunderbolt interface supports hot-swapping, allowing users to connect or disconnect PCIe devices without rebooting the host system. This flexibility is particularly for dynamic cluster environments.
The main directory contains KiCad PCB project files, a LICENSE, and a README. The remaining files are stored in the following directories:
img - contains graphics for this READMEdoc - contains schematics in pdf formassets - contains visual assets for showcasing this design on Open Hardware Portal.This project is published under the Apache-2.0 license.
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