PCB Top layer / PCB Bottom layer

Block diagram

Projects

The following folders contain vhd files that can be used to create a Quartus II project for this board:

• cpld_passthrough: This generates a CPLD bitstream that makes it work as a passthrough so we can send the signals required for programming the FPGA.
• cpld_flash_boot: This generates a CPLD bitstream that reads an already-programmed AT45DB041B serial flash, configures the FPGA on startup, and then passes the Passive Serial programming header through to the FPGA.
• fpga_blink: Blinks the LEDs that are connected to the FPGA.
• fpga_vga: Generates a 640x480 VGA signal that has some characters of a 32x32 monochromatic font. Uses an internal PLL to convert the 80 MHz clock into the 25 MHz pixel clock required.
• multicomp: Details on mods to Grant Searle's guide to create a retro computer

Getting started: guide to building the projects and programming the board

Newer Windows note: USB Blaster clones no longer work reliably due to driver issues. Using a Windows XP virtual machine with USB passthrough is a better option for programming.

Flex PCB to add GPIOs

In the pin-flex folder you can find files to manufacture a very simple flexible PCB that is useful to map out certain unused pins:

To use it, you need to remove R47 and C61, and lift the existing pins using a needle or something similar, while keeping pin 40, 51 and 52 connected to the original board.

Documentation

The docs folder contains many documents that are useful for this project.

When using Quartus to generate the bitstream, remember that by default non defined pins are marked as outputs and are LOW. This can cause short circuits and destroy the rest of the circuit. To avoid that, you should go to Assignments->Device->Device and Pin Options...->Unused Pins and set it to "As input tri-stated with weak pull-up". DO THIS FOR BOTH PROJECTS!

Thanks to

Carlos Pantelides (cpantel)

Inspirations

• https://github.com/UzixLS/ncomputing-l230