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There aren't many OSHW ECP5 boards available. Given that this FPGA is fully supported by an open source toolchain I decided to create one. In order to make use of the DDR3L support the ECP5 has, I've added some DDR3L memory. The board matches the feather format
Example code for Verilog, Litex, And RiscV can be found here:
We have an OrangeCrab group on the 1BitSquared Discord
This board is an OSHWA approved design: AU000015
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