Visual Twin

Public

rrenamed/openai-pcb-reverse-engineering

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Files for version 1. Choose the source project or an available generated package.

Source package

Original hardware design source archive

Original project source325 KB

Fabrication package

Gerbers and drill, pick-and-place, DRC report, and the 3D model

Gerbers and drill zip241 KBPick and place (CSV)8.4 KB3D board only (GLB)3.6 MB3D model (GLB)5.1 MB

Review package

Schematics, PCB views, BOM, and extracted files

PCB SVG714 KBBoard render291 KBPCB B.CrtYd6.0 KBPCB B.Cu111 KBPCB B.Fab83 KB

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README

Visual-only local models

cap-stripe.wrl is a procedurally authored overlay for the narrow dark stripe visible on top of C10 in the public presentation render. It is licensed CC0-1.0 and contains no imported third-party geometry.

Its dimensions, placement, and color are SELECTED_FOR_VISUALIZATION. They are not evidence of OpenAI's original capacitor, manufacturer, construction, value, or polarity. The stock KiCad capacitor body remains separately governed by the KiCad library license recorded in source/toolchain.yaml.

reviewed-surface-annuli.wrl contains five procedurally authored planar ring and dark-center proxies, generated from evidence/annulus-surface-review.json. The corresponding colors and plane heights are declared in source/visual-surface-selection.json. This CC0-1.0 scene is attached to the existing visual-only VFP1 container, not to new component or via footprints. It changes no copper, drill, mask opening, net, or layer span. It is not evidence of physical vias, plating, surface finish, or tenting. The other 107 annular candidates remain unmodeled; exclusion does not prove their absence.

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