This is inspired by Fugu MPPT.
The design has been optimized with real life experience, considering signal noise and EMI issues,
replaced hall sensor with shunt resistor and faster switching. See the list below for more changes.
How to build
You can place the ESP32-S3 directly on the board and use the USB pin header or the ESP-PROG header for flashing.
Alternatively, you can place SMD pin headers where the ESP32-S3 footprint is and use the MCU header board.
This makes it easier to replace the MCU in case it breaks. You can of course create your own header board using another
MCU series such as the STM32.
order PCB (or make @home)
1x Fugu2.kicad_pcb
1x psu/buck100.kicad_pcb (for 3.3V supply)
1x mcu-head/Fugu2-esp32s3-wroom-head.kicad_pcb (optional. this allows easy replacement of the ESP32S3 during
development. alternatively place the ESP32(-S3) directly on the Fugu2 board)
you can use kikit-packer
or Kikakuka to create a single PCB for the manufacturing job.
kikit-packer instructions: follow the install instructions in
the readme. make sure you have Fugu2/
and kikit-packer/ in the same directory. then run panelize.sh (linux, mac) or panelize.bat (windows). It
will generate combined.kicad_pcb which you can send to your PCB manufacturer.
assemble PCBs (ibom TODO)
you can order assembly through pcbway or jlcpcb
if you assemble @home
place solder-paste on all SMD pads
put SMD items first (resistors, caps, diodes, inductors and then IC)
heat with a hotplate (a cooking pan filled with sand works) or hot air gun
solder the THT components (electrolytic caps, power inductor, mosfets, pin headers, power terminal blocks)
mount the PCB on a heatsink (expect 20W of heat)
drill mounting holes
if mosfets are not isolated use thermal pads for isolation
M3 plastic screws are a cheap and easy alternative
enclosure
todo: there is no enclosure yet
build inductor
order core and copper wire.
cores are available at semic or digikey.
I buy wire from eBay.
dense half-bridge PCB design for minimum parasitic inductance
short and min-area gate-drive tracks for minimum gate drive inductance
low-side rectifier Schottky barrier diode to reduce free-wheeling loss and reverse-recovery loss
cascade of input capacitors: 220nF, 1uF, 10uF, 470uF input caps to minimize capacitor ESR-loss
low impedance electrolytics
optimized coil designs
optimized core flux density and core power loss
multi-strand coil for reduced R_dc and R_ac (considering skin &
proximity effect)
Inductor Quick Start Guide
The inductor should have an inductivity value that is high enough to keep the ripple current in range, a common design
rule is that ripple is in the range of 0.3 ~ 0.5 of the dc current. Notice that inductivity decreases with dc bias
current. The dc bias current is the average current through the coil. This means that the higher the output current of
the converter,
the lower the inductivity. This causes the AC indcutor ripple current to rise faster than linear with higher currents.
High ripple currents cause more loss in the inductor core (hysteresis loss) and capacitors (parasitic ESR).
Going beyond the safe limits can cause extremely high peak currents leading to destruction of the FETs.
The micrometals design tool is a
good starting point to find suitable inductor designs with mostly toroid cores. It gives the user recommendations on
core shape, core material and wire (diameter and strands).
Off-the-shelf inductors exists, however they are usually expensive (>$20), such as the
CODACA CPEX4141L-500MC (optimized for dc bias / saturation current) and CPEA4141L-500MC (optimized for low loss).
On LCSC you'll
find Ruishen RSEQ32-470M,
RSEQ3635-460M and
RSEQ3635-700M.
I have only tested toe CODACA cores and no experience with the LCSC parts.
Diving into inductor design can be overwhelming at first. In practice there is no perfect inductor for a specific
application.
Given current, voltage and temperature contraints, the designer usually optimizes for one or more goals, which always
comes with trade-offs. In short:
chose inductivity L0 high enough (L0 is the unbiased inductivity, e.g. I=0)
good dc bias saturation performance (L drops with increased dc current)
low DC resistance of winding
low core losses
Winding an inductor is nothing to worry about and is actually fun. Below you'll find two design proposals, one
for 12 and 24V, upto 40A and the other for 48V batteries. Before, let's have a short intro to better understand the
design decisions.
A well designed inductor has a core/copper loss ratio between 50/50 and
20/80 (micrometals).
Copper is easier to cool
than the core.
With higher DC output current the core material magnetization increases and inductivity value drops. A good design has a
maximum drop of ~50% of its initial inductivity.
Lower inductivity will cause higher ripple current, which will cause more loss in the core and capacitors (increased AC
amplitude of magnetic field and current).
For higher DC currents chose a larger core (or materials optimized for DC saturation, which can have low availability
and a higher price tag).
For higher output voltage chose a higher inductivity value.
Sendust (KoolMµ) is a magnetic core material commonly used for power applications. It is affordable with high
availability,
has good saturation characteristics and low loss.
Manufacturers offer optimized materials, tuning for price, dc bias and/or core loss.
(KDM: KPH, KAM, KAH, KH)
For the coil winding choose isolated Copper wire made for electrical applictions commonly referred as W210 with typical
conductivity of 58.5 MS/m. Choose diameter and number of strands so that inner diameter of the toroid core has a good
usage.
Prefer multiple strands for easier winding (>2mm diameter becomes unhandy to wind) and reduced ac loss (skin & proximity
effects). Many strands (>10) increase complexity of winding. A diameter between 1 and 2mm appears to be good choice.
More copper reduces dc resistance and leakage fringing (TODO ref). Evenly wind the wire on the core to reduce leakage
fringing.
12V or 24V battery up to 40A
Optimized for low loss 12V and 24V batteries, up to 40A battery current @39kHz
In a nutshell, the LS switch should have low Rds_on, low Qrr, low Qgd (low self turn-on). The HS switch should have low
Qsw.
See Toshibas Product Guide on pg. 16.
Use fetlib for an extensive parametric search and ranking by power loss estimation.
High Side Mosfet (HS, cntrl)
exposed to switching stress
short switching times to lower switching losses (small Qsw) but increase potential ringing (EMI)
Qrr rises with increasing temperature, current and current transient
Qrr ringing and loss can be reduced with external Schottky diode
or cascode configuration.
low Rds_on
low Qgd, Qgd/Qgs (prevent self turn-on)
low r_g (prevent self turn-on)
Picks
IPP040N08NF2S
IPP022N12NM6
IPP019N08NF2S
Current through the LS Switch always flows from source to drain (4th quadrant of V-I plane),
which makes the gate drive signal rather irrelevant. It is much easier to switch than the HS, ringing is generally
not an issue. TI Gate Drive Fudamentals
Switching happens near zero voltage, as the body diode is usually already/still conducting when switching on/off.
Choose a MOSFET that is designed for synchronous rectification. Consider switch node ringing and choose a higher voltage
fet to avoid channel break-down if needed.
Higher input voltages
input caps
remove PV supply diode at board power supply
bigger inductivity to keep ripple current at a reasonable level
change mosfets HS & LS V_GS(breakdown) to 120V, 150V or 200V
voltage sense resistors
Water Robustness Considerations
Add a clear varnish coat to the PCB and components (especially the current sensor circuit, Supply DCDC converters)
Choose low R_filt for the anti-aliasing filter at the current sensor (INA226) inputs to avoid destruction of the
chip's amplifiers.
If using a (almost) sealed enclosure (aluminium box), add a bag silica to compensate internal humidity. When the
converter is cooling down at night it'll suck water into the enclosure. The ESP32 WROOM metallic case is not sealed.
Consider placing a membrane? Sticker on its breathing hole.
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