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An experiment in agent-driven, full-stack open-source hardware: design a Linux-class dev board from datasheet to shell prompt with as much LLM automation as physically possible, then write up what worked and what didn't.
Target MPU: NXP i.MX 6ULL (MCIMX6Y2CVM08AB, ~$5–6 @ qty 10)
Peripherals (v1 spec):
| Layer | Tool | Notes |
|---|---|---|
| Datasheet RAG | Docling → LanceDB hybrid → custom FastMCP | Required citations on every answer |
| Block diagrams | Mermaid (source-of-truth) + drawio MCP | mermaid diffs in git, drawio for blog |
| Schematic | atopile (.ato) | parametric pick_part, JLC-aware |
| Parts | jlcparts SQLite + easyeda2kicad | offline part DB + symbol/footprint pulls |
| Layout | KiCad 9 + Seeed kicad-mcp-server | 39-tool MCP |
| Routing | KiCad PNS (DDR3, USB, ENET) + Freerouting CLI (boring nets) | hybrid; agent does length-tune constraints |
| Sim | ngspice + InSpice | power rails, PMIC loop, Class-D filter |
| Fab/PCBA | JLCPCB API |
| basic/preferred parts where possible |
| Firmware build | Buildroot + mainline U-Boot + mainline Linux | Yocto is overkill |
| Firmware debug | OpenOCD + JTAG + serial-download recovery |
| LLM | Opus 4.7 (1M) for layout/DDR; Sonnet 4.6 for cheap Q&A | prompt-cache datasheet + HDG |
Quilter shipped an i.MX 8M Mini DDR4 board with an autonomous physics engine in 40 hours — closed-source. atopile / tscircuit / Diode have shipped public LLM-driven schematics but only on 2-layer ESP32-class boards. Nobody has publicly crossed the DDR Rubicon on a fully open agent stack. That's the gap.
Scaffolding. See PLAN.md for the decision log and open questions.
MIT.
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