Imported from GitHub: TinyTapeout/caravel-mvp-pcb · commit 98ba1e9 · license Apache-2.0
Description
the minimum necessary to use a Caravel chip (Google MPW or chipIgnite)
README
Caravel MVP
This is a sample "minimum viable PCB" for Caravel chips: Google MPW or chipIgnite, including variants for TinyTapeout.
Fork this repo to get a head start on spinning your own Caravel based PCB.
The circuit includes all the critical (required) elements, basically:
- power regulation;
- a clock signal;
- flash memory, for code; and
- the chip itself
along with basic passive support (bypass caps...) Full schematic PDF here
It also has a few switches and connectors, as demonstrations. These are enclosed in dotted boxes to highlight their optionality.

The full schematic is available as a PDF in the doc/ directory.
A sample layout was also included, though routing was not completed as you're certainly going to want to change components and floorplan around for your custom boards.

Footprints and Symbols
Useful symbols and footprints are used here and elsewhere, included as a submodule.
git submodule update --init --recursive
will actually brings these in to your local fs.
TinyTapeout
A TinyTapeout-specific versions are also included. If using along with the Caravel CPU, the only real differences are in the symbol and net names used, as this helps to clarify things a lot.
However, you may also use it stand-alone, in which case a few components aren't required (e.g. flash memory) and a few additional ones are needed (mainly passives for pull-ups and config bootstraps).
If you are implementing a PCB for a TinyTapeout chip, simply:
git checkout tt123
and the schematic (TT version PDF here) will include something like this instead:

along with the TT standalone config sheet.
Resources
TinyTapeout
TinyTapeout is an educational project that makes it easier and cheaper than ever to get your digital designs manufactured on a real chip.
It's the easiest and cheapest way I know to get your designs on an ASIC.
Caravel
Caravel is composed of a harness frame plus two wrappers for drop-in modules for the management area and user project area. Basically a SoC with a RISC-V CPU, space for user designs and ways to connect those to the outside world.
See:
License
This is meant as a template and starting point for your own projects and is all released under as open hardware. The MVP schematics and layouts are
Copyright (C) 2023 Pat Deegan, Psychogenic Technologies
and released under the terms of the Apache License, version 2.0. See the accompanying LICENSE file for details.
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